PDSH 2160(IEC 60664-1)爬电距离路径被导电浮动部件分隔后怎么测量?

2020-12-29 14:24:24

Standard: IEC 60664-1:2007

Subclause: 6.2

Subject: Creepage distance less than X

To be approved at 2020 CTL Plenary Meeting


Question:

A PCB sample is tested according to sub-clause 6.2 of IEC 60664-1:2007. How to measure creepage distances when the path is split by floating conductive parts when d < X and D ≥ X?

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NOTE: d < X, D ≥ X, C is conductive floating part 

Figure test PCB sample


Different interpretations of total creepage distance are as follows:

Opinion 1: The creepage distance is measured as shown in IEC 60664-1:2007 example 11. Creepage distance is the distance = d + D.

Opinion 2: Since the d is less than X, the d is considered as zero.Creepage distance is the distance = D.

Which opinion is correct?


Decision:

Opinion 1 is correct. Creepage distance is the distance = d + D.


问题:

依据IEC 60664-1:2007第6.2条款测量PCB样品左右方块间爬电距离(见图)时,当d<X同时D≥X,且左右方块之间的路径被导电浮动部件C分隔,该如何测量?

目前有两种观点:

1、按IEC 60664-1:2007示例11所示,爬电距离为d+D

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2、因为d<X可以被视为0,爬电距离为D

请问,哪种观点是正确的?


决定:

观点1正确,爬电距离为d+D


决议提示:

TC109支持观点1,并在下一版IEC 60664-1中会新修订一条规则:

如果槽宽度小于X,则爬电距离直接跨过槽测量,且不考虑槽的轮廓

现行版本(IEC 60664-1:2007)的规则是:所考虑的路线包括宽度小于Xmm而深度为任意的平行边或收敛形边的槽,则直接跨过槽测量(虚线为电气间隙路径,实线为爬电距离路径,见下图)

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大侠提示:

PDSH2160号决议是今年新提出的暂行决议,等大会表决通过后才正式批准。本决议主要内容是爬电距离被导电浮动导体分隔,分隔段若有d<X也不将d视为0

朋友们要注意本决议与IEC 62368-1有冲突(见下图)

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IEC 62368-1针对相同案例的决定是d视为0